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RT8004
3A, 4MHz, Synchronous Step-Down Regulator
General Description
The RT8004 is a high efficiency synchronous, step-down DC/DC converter. Its input voltage range is from 2.65V to 5.5V and provides an adjustable regulated output voltage from 0.8V to 5V while delivering up to 3A of output current. The internal power switch with 75m on-resistance increases efficiency and eliminates the need for an external Schottky diode. Switching frequency is set by an external www..com resistor or can be synchronized to an external clock. 100% duty cycle provides low dropout operation extending battery life in portable systems. External compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The RT8004 operates in Forced Continuous Mode which reduces noise and RF interference. 100% duty cycle in Low Dropout Operation further maximize battery life.
Features
High Efficiency : Up to 95% Low Quiescent Current : 100A Low RDS(ON) Internal Switches : 75m Programmable Frequency : 300kHz to 4MHz No Schottky Diode Required 0.8V Reference Allows Low Output Voltage Low Dropout Operation : 100% Duty Cycle Synchronizable Switching Frequency Power Good Output Voltage Monitor Over Temperature Protection Thermally Enhanced SOP-16, TSSOP-16 (Exposed Pad) and 16-Lead VQFN 4x4 Packages RoHS Compliant and 100% Lead (Pb)-Free
Applications
Portable Instruments Battery-Powered Equipment Notebook Computers Distributed Power Systems IP Phones Digital Cameras
Ordering Information
RT8004 Package Type S : SOP-16 CP : TSSOP-16 (Exposed Pad) QV : VQFN-16L 4x4 (V-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard)
Note : Richtek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating.
Pin Configurations
(TOP VIEW)
PGOOD VDD PVDD LX 16 15 14 13 COMP FB RT SYNC 1 2 3 4 GND 17 5678 EN/SS GND PVDD LX 12 11 10 9 LX PGND PGND LX
Marking Information
For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail.
VQFN-16L 4x4
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RT8004
(TOP VIEW)
VDD PGOOD COMP FB RT SYNC EN/SS GND 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 PVDD LX LX PGND PGND LX LX PVDD
VDD PGOOD COMP FB RT SYNC EN/SS GND
2 3 4 5 6 7 8
16 15 14 13 GND 12 17 11 10 9
PVDD LX LX PGND PGND LX LX PVDD
SOP-16
TSSOP-16 (Exposed Pad)
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Typical Application Circuit
47uF V IN 2.65V to 5.5V
RPG 100k PGOOD CTH RTH 1000pF 10k R2 240k R OCS 309k External Clock R SS 4.7M C SS 470pF
VDD RT8004 PGOOD COMP LX FB RT SYNC
R1 510k
C1 22pF
L1 1uH
V OUT 2.5V/3A C OUT 47uF
PVDD C IN1 10uF PVDD C IN2 10uF PGND
EN/SS
GND
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Functional Pin Description
Pin No. RT8004PS RT8004PCP RT8004PQP 1 2 1 2 15 16 Pin Name VDD Pin Function Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD is equal to PVDD. Power Good Indicator. Open-drain logic output that is pulled to PGOOD ground when the output voltage is not within 12.5% of regulation point. Error Amplifier Compensation Pin. The current comparator COMP threshold increases with this control voltage. Connect external compensation elements to this pin to stabilize the control loop. FB RT SYNC Feedback Pin. Receives the feedback voltage from a resistive divider connected across the output. Oscillator Resistor Input. Connecting a resistor to ground from this pin sets the switching frequency. External Clock Synchronization Input. The internal oscillator can be synchronized to an external clock applied to this pin. If not use, please connect this pin to VDD or GND. Enable Control and Soft-Start Input. Forcing this pin below 0.5V shuts down the RT8004. In shutdown all functions are disabled drawing < 1uA of supply current. A capacitor to ground from this pin sets the ramp time to full output current. Signal Ground. All small-signal components, compensation components and the exposed pad on the bottom side of the IC should connect to this ground, which in turn connects to PGND at one point. Power Input Supply. Decouple this pin to PGND with a capacitor. Internal Power MOSFET Switches Output. Connect this pin to the inductor. Power Ground. Connect this pin close to the terminal of C IN and COUT .
3 4
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3 4 5 6
1 2 3 4
5 6
7
7
5
EN/SS
8 9, 16 10,11, 14, 15 12, 13
8, Exposed Pad (17) 9, 16 10,11, 14, 15 12, 13
6, Exposed GND Pad (17) 7, 14 PVDD
8, 9, 12, 13 LX 10, 11 PGND
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Function Block Diagram
RT ISEN SYNC ExtSyn Oscillator Slope Com PVDD
COMP 0.8V FB EA Output Clamp OC Limit Driver Ext_SS Int_SS LX
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EN/SS
SD
0.9V 0.7V
Control Logic
NISEN 0.4V NMOS I Limit 0.8V BG VREF OTP
PGND
PGOOD
POR
POR
VDD
GND
Operation
Main Control Loop The RT8004 is a monolithic, constant-frequency, current mode step-down DC/DC converter. During normal operation, the internal top power switch (P-Channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the peak inductor current reach the value defined by the voltage on the COMP pin. The error amplifier adjusts the voltage on the COMP pin by comparing the feedback signal from a resistor divider on the FB pin with an internal 0.8V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the COMP voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-Channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The bottom current limit is set at -2A. The operating frequency is set by an external resistor connected between the RT pin and ground. The practical switching frequency can range from 300kHz to 4MHz. Power Good comparators will pull the PGOOD output low if the output voltage comes out of regulation by 12.5%. In an overvoltage condition, the top power MOSFET is turned off and the bottom power MOSFET is switched on until either the overvoltage condition clears or the bottom MOSFET' s current limit is reached. Frequency Synchronization The internal oscillator of the RT8004 can be synchronized to an external clock connected to the SYNC pin. The frequency of the external clock can be in the range of 300kHz to 4MHz. For this application, the oscillator timing resistor should be chosen to correspond to a frequency that is about 20% lower than the synchronization frequency.
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Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum ontime. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle eventually reaching 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-Channel MOSFET and the inductor. Low Supply Operation The RT8004 is designed to operate down to an input supply voltage of 2.65V. One important consideration at low input supply voltages is that the RDS(ON) of the P-Channel and N-Channel power switches increases. The user should calculate the power dissipation when the RT8004 is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded.
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Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at duty cycles greater than 50%. It is accomplished internally by adding a compensating ramp to the inductor current signal. Normally, the maximum inductor peak current is reduced when slope compensation is added. In the RT8004, however, separated inductor current signals are used to monitor over current condition and minimum peak current. This keeps the maximum output current and minimum peak current relatively constant regardless of duty cycle. Short-Circuit Protection When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. A current runaway detector is used to monitor inductor current. As current increasing beyond the control of current loop, switching cycles will be skipped to prevent current runaway from occurring.
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Absolute Maximum Ratings
(Note 1) Supply Input Voltage ---------------------------------------------------------------------------------------------- -0.3V to 6V LX Pin Switch Voltage -------------------------------------------------------------------------------------------- -0.3V to (PVDD + 0.3V) Other I/O Pin Voltages ------------------------------------------------------------------------------------------- -0.3V to (VDD + 0.3V) Power Dissipation, PD @ TA = 25C SOP-16 -------------------------------------------------------------------------------------------------------------- 1.25W TSSOP-16 ----------------------------------------------------------------------------------------------------------- 2.66W VQFN-16L 4x4 ----------------------------------------------------------------------------------------------------- 2.315W Package Thermal Resistance (Note 4) SOP-16, JA -------------------------------------------------------------------------------------------------------- 100C/W TSSOP-16, JA ----------------------------------------------------------------------------------------------------- 47C/W www..com VQFN-16L 4x4, JA ------------------------------------------------------------------------------------------------ 54C/W VQFN-16L 4x4, JC ----------------------------------------------------------------------------------------------- 7C/W Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260C Junction Temperature --------------------------------------------------------------------------------------------- 150C Storage Temperature Range ------------------------------------------------------------------------------------ -65C to +150C ESD Susceptibility (Note 2) HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 3)
Supply Input Voltage ---------------------------------------------------------------------------------------------- 2.65V to 5.5V Ambient Temperature Range ------------------------------------------------------------------------------------ -40C to 85C Junction Temperature Range ------------------------------------------------------------------------------------ -40C to 125C
Electrical Characteristics
(VDD = 3.3V, TA = 25C, unless otherwise specified)
Parameter Input Voltage Range Feedback Voltage Feedback Leakage Current Input DC Bias Current Reference Voltage Line Regulation Output Voltage Load Regulation Power Good Power Good Range Power Good Pull-Down Resistance
Symbol VDD VFB IFB (Note 5)
Test Conditions
Min 2.65 0.784 --
Typ -0.8 -400 -0.04 0.05
Max 5.5 0.816 0.4 520 1 0.2 +/-0.2
Units V V A A A
Active, VFB = 0.78V, Not switching Shutdown, VEN < 0.1V VIN = 2.7V to 5.5V (Note 5) (Note 5)
180 ----
%/V %
Measured in Servo Loop, VCOMP = 1.2V to 1.6V (Note 5)
---
+/-12.5 --
+/-15 120
%
To be continued
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Parameter Switching Frequency Sync Frequency Range Switch On Resistance, High Switch On Resistance, Low Peak Current Limit Undervoltage Lockout Threshold
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Symbol fOSC
Test Conditions ROSC = 309k Switching Frequency Range (Note 6)
Min 0.8 0.3 0.3 45 45 4 2.25 ---0.65
Typ 1 --75 69 5.2 2.52 0.15 ----
Max 1.2 4 4 110 100 7 2.7 -1 1 0.95
Units MHz MHz MHz m m A V V A A V
RPFET RNFET ILIM
ISW = 1A ISW = 1A VDD Rising Hysteresis VEN = 0V, VIN = 5.5V
Current
EN/SS Leakage Current Enable Threshold VEN
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. JA is measured in the natural convection at TA = 25C on 4-layers high effective thermal conductivity test board of JEDEC 51-7 thermal measurement standard. The case point of JC is on the expose pad for the QFN package. Note 5. The specifications over the -40C to 85C operation ambient temperature range are assured by design, characterization and correlation with statistical process controls. Note 6. The external synchronous frequency must be equal to 1 to 1.3 times of the internal setting frequency. The switching frequency reange is guaranteed by design but not production tested.
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Typical Operating Characteristics
Efficiency vs. Output Current
100% 100
0.30% 0.30
Load Regulation
VIN = 3.3V, VOUT = 2.5V
90 90% 80 80%
VIN = 5V
Efficiency (%)
70% 70 60% 60
V OUT Devation (%)
1000 1500 2000 2500 3000
VIN = 3.3V
0.20% 0.20
0.10% 0.10
50 50% 40 40% 30 30%
0.00% 0
20% 20 www..com 10 10%
-0.10% -0.10
0 0%
0
VOUT = 2.5V, 1M Continuous Mode Operation
500
-0.20% -0.20 50 550 1050 1550 2050 2550 3050
Output Current (mA)
Output Current (mA)
Soft-Star Power On
VIN = 3.3V, VOUT = 2.5V RLOAD = 0.83
Power Off
VIN = 3.3V, VOUT = 2.5V, IOUT = 0A
VOUT (1V/Div) VSS (1V/Div) IL (1A/Div) Time (2.5ms/Div)
IL (2A/Div) VOUT (2V/Div) VLX (5V/Div) VIN (2V/Div) Time (25ms/Div)
Ripple Voltage
VIN = 3.3V, VOUT = 2.5V, IOUT = 3A
Load Transien Response
VIN = 3.3V, VOUT = 2.5V ILOAD = No Load to 3A
VOUT (10mV/Div) VLX (2V/Div)
VOUT (50mV/Div)
IL (2A/Div) Time (500ns/Div)
IL (1A/Div) Time (25s/Div)
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VREF Deviation vs. Temperature
1.50% 1.00%
Frequency vs. RRT
4500 4000 3500
VIN = 3.3V
VIN = 3.3V
V REF Deviation (%)
0.50% 0.00% -0.50%
Frequency (kHz)
-50 -25 0 25 50 75 100 125
3000 2500 2000 1500 1000 500 0 0 200 400 600 800 1000 1200 1400
-1.00% www..com -1.50%
Temperature (C)
RRT (k ) (k)
Frequency vs. Input Voltage
1.04 1.032
Frequency vs. Temperature
5 4
R = 309k
VIN = 3.3V
Frequency Deviation (%)
3 3.5 4 4.5 5 5.5
3 2 1 0
Frequency (MHz)
1.024 1.016 1.008 1 0.992
-1 -2 -3 -4 -5
-50 -25 0 25 50 75 100 125
Input Voltage (V)
Temperature (C)
Quiescent Current vs. Input Voltage
500 450
Peak Current Limited vs. Input Voltage
5.5
VOUT = 2.5V
Quiescent Current (uA)
400 350 300 250 200 150 100 50 0 3 3.5 4 4.5 5 5.5
Peak Current Limited (A)
5.3
5.1
4.9
4.7
4.5 3 3.5 4 4.5 5 5.5
Input Voltage (V)
Input Voltage (V)
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Application Information
The basic RT8004 application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Operating Frequency Selection of the operating frequency is a tradeoff between efficiency and component size. High frequency operation allows the use of smaller inductor and capacitor values. www..com Operation at lower frequencies improves efficiency by reducing internal gate charge and switching losses but requires larger inductance values and/or capacitance to maintain low output ripple voltage. The operating frequency of the RT8004 is determined by an external resistor that is connected between the RT pin and ground. The value of the resistor sets the ramp current that is used to charge and discharge an internal timing capacitor within the oscillator. The RT resistor value can be determined by examining the frequency vs. RRT curve. Although frequencies as high as 4MHz are possible, the minimum on-time of the RT8004 imposes a minimum limit on the operating duty cycle. The minimum on-time is typically 110ns. Therefore, the minimum duty cycle is equal to 100 x 110ns x f(Hz). Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current IL increases with higher VIN and decreases with higher inductance. V V IL = OUT 1 - OUT f x L VIN Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is IL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation :
VOUT VOUT L= 1 - V f x IL(MAX) IN(MAX)
Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates "hard", which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don' t radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : IRMS = IOUT(MAX) VOUT VIN VIN -1 VOUT
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This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series www..com resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, VOUT, is determined by :
VOUT 1 IL ESR + 8fCOUT
VFB RT8004 GND R1
be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The output voltage is set by an external resistive divider according to the following equation :
VOUT = 0.8V(1 +
R2 ) R1
The resistive divider allows the VFB pin to sense a fraction of the output voltage as shown in Figure 1.
VOUT R2
The output ripple is highest at maximum input voltage since IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must
Figure 1. Setting the Output Voltage Frequency Synchronization The RT8004' s internal oscillator can be synchronized to an external clock signal. During synchronization, the top MOSFET turn-on is locked to the falling edge of the external frequency source. The synchronization frequency range is 300kHz to 4MHz. Synchronization only occurs if the external frequency is greater than the frequency set by the external resistor. Because slope compensation is generated by the oscillator' s RC circuit, the external frequency should be set 25% higher than the frequency set by the external resistor to ensure that adequate slope compensation is present. Soft-Start The EN/SS pin provides a means to shut down the RT8004 as well as a timer for soft-start. Pulling the EN/SS pin below 0.5V places the RT8004 in a low quiescent current shutdown state (IQ < 1A).
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The RT8004 contains an internal soft-start clamp that gradually raises the clamp on COMP after the EN/SS pin is pulled above 0.8V. The full current range becomes available on COMP after 1024 switching cycles. If a longer soft-start period is desired, the clamp on COMP can be set externally with a resistor and capacitor on the EN/SS pin as shown in Typical Application Circuit. The soft-start duration can be calculated by using the following formula:
TSS = RSS x CSS x ln(
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losses are proportional to VDD and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. In continuous mode the average output current flowing through inductor L is "chopped" between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows : RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1-DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Thermal Considerations In most applications, the RT8004 does not dissipate much heat due to its high efficiency. But, in applications where the RT8004 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance. To avoid the RT8004 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by : TR = PD x JA Where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by : TJ = TA + TR Where TA is the ambient temperature.
VIN ) (s) VIN - 1.8V
Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VDD quiescent current and I2R losses. The VDD quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VDD quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge Q moves from VDD to ground. The resulting Q/t is the current out of VDD that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge
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As an example, consider the RT8004 in dropout at an input voltage of 3.3V, a load current of 3A and an ambient temperature of 70C. From the typical performance graph of switch resistance, the RDS(ON) of the P-Channel switch at 70C is approximately 97m. Therefore, power dissipated by the part is : PD = (ILOAD)2 (RDS(ON)) = (3A)2 (97m) = 0.873W For the TSSOP package, the JA is 47C/W. Thus the junction temperature of the regulator is : TJ = 70C+(0.873W) (47C/W) = 111C
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LX node is with high frequency voltage swing and should be kept small area. Keep all sensitive small-signal nodes away from LX node to prevent stray capacitive noise pick-up. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. You can connect the copper areas to any DC net (PVIN, SVIN, VOUT, PGND, SGND, or any other DC rail in your system). Connect the FB pin directly to the feedback resistors. The resistor divider must be connected between VOUT and GND.
Which is below the maximum junction temperature of 125C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response
The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ILOAD(ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The COMP pin external components and output capacitor shown in Typical Application Circuit will provide adequate compensation for most applications. Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8004. A ground plane is recommended. If a ground plane layer is not used, the signal and power grounds should be segregated with all small-signal components returning to the GND pin at one point that is then connected to the PGND pin close to the IC. The exposed pad should be connected to GND. Connect the terminal of the input capacitor(s), CIN, as close as possible to the PVDD pin. This capacitor provides the AC current into the internal power MOSFETs.
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Outline Dimension
A
H M
J
B
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F
C I D
Symbol A B C D F H I J M
Dimensions In Millimeters Min 9.804 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 Max 10.008 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270
Dimensions In Inches Min 0.386 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 Max 0.394 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
16- Lead SOP Plastic Package
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D L EXPOSED THERMAL PAD (Bottom of Package) E U V E1
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e A A1 b A2
Symbol A A1 A2 b D e E E1 L U V
Dimensions In Millimeters Min 0.850 0.000 0.800 0.190 4.900 0.65 6.200 4.300 0.450 2.000 2.000 6.600 4.500 0.750 3.000 3.000 Max 1.200 0.150 1.050 0.300 5.100
Dimensions In Inches Min 0.033 0.000 0.031 0.007 0.193 0.026 0.244 0.169 0.018 0.079 0.079 0.260 0.177 0.030 0.118 0.118 Max 0.047 0.006 0.041 0.012 0.201
16-Lead TSSOP (Exposed Pad) Plastic Package
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D D2 SEE DETAIL A L
1
E
E2
1
1 2
e
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b
2
A A1 A3
DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated.
Symbol A A1 A3 b D D2 E E2 e L
Dimensions In Millimeters Min 0.800 0.000 0.175 0.250 3.950 2.000 3.950 2.000 0.650 0.500 0.600 Max 1.000 0.050 0.250 0.380 4.050 2.450 4.050 2.450
Dimensions In Inches Min 0.031 0.000 0.007 0.010 0.156 0.079 0.156 0.079 0.026 0.020 0.024 Max 0.039 0.002 0.010 0.015 0.159 0.096 0.159 0.096
V-Type 16L VQFN 4x4 Package
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Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
www.richtek.com 16
DS8004-03
September 2007

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Price & Availability of RT8004

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